1. Field of the Invention
The present invention relates to liquid crystal displays (LCDs). More specifically, the present invention relates driving schemes for liquid crystal displays.
2. Discussion of Related Art
Liquid crystal displays (LCDs), which were first used for simple monochrome displays, such as calculators and digital watches, have become the dominant display technology. LCDs are used routinely in place of cathode ray tubes (CRTs) for both computer displays and television displays. Various drawbacks of LCDs have been overcome to improve the quality of LCDs. For example, active matrix displays, which have largely replaced passive matrix displays, reduce ghosting and improve resolution, color gradation, viewing angle, contrast ratios, and response time as compared to passive matrix displays.
However, the primary drawbacks of conventional twisted nematic LCDs are narrow viewing angle and low contrast ratio. Even the viewing angle of active matrixes is much smaller than the viewing angle for CRT. Specifically, while a viewer directly in front of an LCD receives a high quality image, other viewers to the side of the LCD would not receive a high quality image. Multi-domain vertical alignment liquid crystal displays (MVA LCDs) were developed to improve the viewing angle and contrast ratio of LCDs. FIGS. 1(a)-1(c) illustrate the basic functionality of a pixel of a vertical alignment LCD 100. For clarity, the LCD of FIG. 1 uses only a single domain. Furthermore, for clarity, the LCDs of FIGS. 1(a)-1(c) (and FIG. 2) described in terms of gray scale operation.
LCD 100 has a first polarizer 105, a first substrate 110, a first electrode 120, a first alignment layer 125, liquid crystals 130, a second alignment layer 140, a second electrode 145, a second substrate 150, and a second polarizer 155. Generally, first substrate 110 and second substrate 150 are made of a transparent glass. First electrode 120 and second electrode 145 are made of a transparent conductive material such as ITO (Indium Tin Oxide). First alignment layer 125 and second alignment layer 140, which are typically made of a polyimide (PI) layer, align liquid crystals 130 vertically in a resting state. In operation, a light source (not shown) sends light from beneath first polarizer 105, which is attached to first substrate 110. First polarizer 105 is generally polarized in a first direction and second polarizer 155, which is attached to second substrate 150, is polarized perpendicularly to first polarizer 105. Thus, light from the light source would not pass through both first polarizer 105 and second polarizer 155 unless the light polarization were to be rotated by 90 degrees between first polarizer 105 and second polarizer 155. For clarity, very few liquid crystals are shown. In actual displays, liquid crystals are rod like molecules, which are approximately 5 angstroms in diameter and 20-25 angstroms in length. Thus, there are over 10 million liquid crystal molecules in a pixel that is 100 μm width by 300 μm length by 3 μm height.
In FIG. 1(a), liquid crystals 130 are vertically aligned. In the vertical alignment, liquid crystals 130 would not rotate light polarization from the light source. Thus, light from the light source would not pass through LCD 100; therefore, LCD 100 gives a completely optical black state and a very high contrast ratio for all color and all cell gaps. Consequently MVA LCDs provide a big improvement on the contrast ratio over the conventional low contrast twisted nematic LCDs. However, as illustrated in FIG. 1(b), when an electric field is applied between first electrode 120 and second electrode 145, liquid crystals 130 reorientate to a tilted position. Liquid crystals in the tilted position rotate the polarization of the polarized light coming through first polarizer 105 by ninety degrees so that the light can then pass through second polarizer 155. The amount of tilting, which controls the amount of light passing through the LCD (i.e., brightness of the pixel), is proportional to the strength of the electric field. Generally, a single thin-film-transistor (TFT) is used for each pixel. However for color displays, a separate TFT is used for each color component (typically, Red, Green, and Blue)
However, the light passing through LCD 100 is not uniform to viewers at different viewing angles. As illustrated in FIG. 1(c), a viewer 210 that is left of center would see a bright pixel because the broad (light rotating) side of liquid crystals 130 faces viewer 210. A viewer 220 that is centered on the pixel would see a gray pixel because the broad side of liquid crystals 130 is only partially facing viewer 220. A viewer 230 that is right of center would see a dark pixel because the broad side of liquid crystals 130 is barely facing viewer 230.
Multi-domain vertical alignment liquid crystal displays (MVA LCDs) were developed to improve the viewing angle problems of single-domain vertical alignment LCDs. FIG. 2 illustrates a pixel of a multi-domain vertical alignment liquid crystal display (MVA LCD) 200. MVA LCD 200 includes a first polarizer 205, a first substrate 210, a first electrode 220, a first alignment layer 225, liquid crystals 235, liquid crystals 237, protrusions 260s, a second alignment layer 240, a second electrode 245, a second substrate 250, and a second polarizer 255. Liquid crystals 235 form the first domain of the pixel and liquid crystals 237 form the second domain of the pixel. When an electric field is applied between first electrode 220 and second electrode 245, protrusions 260 cause liquid crystals 235 to tilt in a different direction than liquid crystals 237. Thus, a viewer 272 that is left of center would see the left domain (liquid crystals 235) as black and the right domain (liquid crystals 237) as white. A viewer 274 that is centered would see both domains as gray. A viewer 276 that is right of center would see the left domain as white and the right domain as black. However, because the individual pixels are small, all three viewers would perceive the pixel as being gray. As explained above, the amount of tilting of the liquid crystals is controlled by the strength of the electric field between electrodes 220 and 245. The level of grayness perceived by the viewer directly related to the amount of tilting of the liquid crystals. MVA LCDs can also be extended to use four domains so that a pixel is divided into 4 domains to provide wide symmetrical viewing angles both vertically and horizontally. Other methods to create MVA LCDs also exist, for example an MVA LCD without protrusions is described in U.S. Utility patent application Ser. No. 11/227,595 (Publication number US 2007/0058122 A1) entitled “Large pixel multi-domain vertical alignment liquid crystal display using fringe field” by Hiap L. Ong. Thus, multi-domain vertical alignment liquid crystal displays, provide high contrast ratio and wide symmetrical viewing angles.
FIG. 3 shows a perspective view of a portion of an LCD 300. LCD 300 includes a first polarizer 302 attached to a substrate 305. The portion illustrated in FIG. 3 shows three pixels P(0, 0), P(0, 1) and P(0, 2). Each pixel includes three color dots CD_1, CD_2, and CD_3. A color mask (not shown) is used to create a color display. For example, the color mask could have a red window for color dot CD_1, a green window for color dot CD_2, and a blue window for color dot CD_3. FIG. 3 illustrates the electrodes for the color dots but for consistency the electrodes are also labeled using CD_1, CD_2, and CD_3. The electrodes of color dots are formed on the top surface of substrate 305. An alignment layer (not shown) would cover the electrodes. Also shown in FIG. 3 are switching elements for each color dot. Specifically, SE1, SE2, and SE3 are used with color dots CD_1, CD_2, and CD_3, respectively for each pixel. The switching elements can be n-channel Field Effect Transistors fabricated using thin film technology.
The switching elements are powered by two types of control lines; specifically, gate lines (G0, G1 and G2) and source lines (S0_1, S0_2, and S0_3). Specifically for pixel P(0, 0), the gate terminals of switching elements SE1, SE2, and SE3 are coupled to gate line G0. The source terminals of switching elements SE1, SE2, and SE3 are coupled to source lines S0_1, S0_2, and S0_3, respectively. The drain terminals of switching elements SE1, SE2, and SE3 are coupled to the electrodes of color dots CD_1, CD_2, and CD_3, respectively, of pixel P(0, 0). In general the for pixel P(x, y), the gate terminals of switching elements SE1, SE2, and SE3 are coupled to gate line GY and the source terminals of switching element SE1, SE2, and SE3 are coupled to source lines SX_1, SX_2, and SX_3, respectively. Typically, gate lines controlled by integrated circuits commonly called “row drivers” and source lines are controlled by integrated circuits commonly called “column drivers”. Additional integrated circuits are also used to control polarity as described below. FIG. 4(a) (described below) illustrates in more detail the use of the control lines, i.e. source lines and gate lines, in a display 400. The electrical connections are typically made using a transparent conductor such as ITO. An alignment layer (not shown) would cover the electrodes. Although not shown in FIG. 3, some displays may also include additional storage capacitors coupled to the electrodes of the color dots to maintain proper charge levels.
FIG. 4(a) illustrates a small portion (6 pixels) of a display 400. Specifically, FIG. 4(a) illustrates pixels P(0, 1), P(0, 2), P(0, 3), P(1, 0), P(1, 1), P(1, 2) and P(1, 3). Each pixel includes three color dots (CD_1, CD_2, and CD_3) and three transistors. FIG. 4(a) also includes source lines (S0_1, S0_2, S0_3, S1_1, S1_2, and S1_3,) and gate lines (G0, G1, G2, and G3). In general, a source line SX_Z and gate line GY is used for color dot CD_Z of pixel P(X, Y) (i.e. Xth pixel on row Y). The source terminal of a transistor is coupled to a source line; the gate terminal of the transistor is coupled to a gate line; and the drain terminal of the transistor is coupled to the electrode of a color dot. For clarity, transistors are labeled and referenced as transistor T(X, Y, Z), such that the source terminal of transistor T(X, Y, Z) is coupled to source line SX_Z and the gate terminal of transistor T(X, Y, Z) is coupled to gate line GZ. In display 400, the drain terminal of transistor T(X, Y, Z) is coupled to color dot CD_Z of pixel P(X, Y). Thus for example, Pixel P(0, 1) includes three color dots CD_1, CD_2, and CD_3, which are coupled to transistors T(0, 1, 1), T(0, 1, 2), T(0, 1, 3), respectively. The gate terminals of transistors T(0, 1, 1), T(0, 1, 2), T(0, 1, 3) are coupled to gate line G1; the source terminals of transistors T(0, 1, 1), T(0, 1, 2), T(0, 1, 3) are coupled to source lines S0_1, S0_2, S0_3, respectively; and the drain terminals of transistors T(0, 1, 1), T(0, 1, 2), T(0, 1, 3) are coupled to color dots CD_1, CD_2, and CD_3, respectively, of pixel P(0, 1). For clarity, the area of each pixel is shaded; this shading is only for illustrative purposes in FIG. 4(a) and has no functional significance.
Each Gate line extends from the left side of display 400 to the right side and controls all the pixels on one row of display 400. Display 400 has one gate line for each row of pixels. Each source line runs from the top to the bottom of display 400. Display 400 has three times the number of source lines as the number of pixels on each row (i.e. one source line for each color dot of each pixel). During operation only one gate line is active at a time. For conventional amorphous silicon NMOS TFTs, the NMOS transistors are active when the gate terminal is pulled high. All transistors in the active row are rendered conductive by a positive gate impulse from the active gate line. Transistors in other rows are blocked by negative level of voltage applied on the non-active gate lines. In some applications, transistors in other rows are blocked by grounding the non-active gate lines. For single crystalline silicon PMOS TFTs, the PMOS TFTs are active when the gate terminal is pulled low. All source lines are active at the same time and each source line provides display data to one transistor on the active row (as controlled by the active gate line). Therefore, gate lines are often called bus lines and source lines are often called data lines due to the way the gate lines and source lines operate. The voltage charges the liquid crystal capacitor to a desired gray scale level (color is provided by color filter layers). When inactive, the electrodes of the color dot are electrically isolated and thus can maintain the field to control the liquid crystals. However, parasitic leakage is unavoidable and eventually the charge will dissipate. For small screens with fewer rows, the leakage is not problematic because the row is “refreshed” quite often. However, for larger displays with more rows there is a longer period between refreshes. Thus, some displays include one or more storage capacitor for each color dot. The storage capacitors are charged with the electrode of the color dot and provide a “maintenance” charge while the row is inactive. Generally, the data lines and bus lines are manufactured using an opaque conductor, such as Aluminum (Al) or Chromium (Cr).
The electrodes in a liquid crystal display can have a positive or negative polarity. Between successive frames the electrodes switch polarity to prevent image quality degradation, which may result from migration of mobile ions. Two common ways of controlling polarity are constant V-com (DC V-com) and V-com Modulation (AC V-com), where V-com is the common reference voltage for the transistors. In constant V-com, the signals on the source line drivers not only control the brightness of the color dot but also directly control the polarity as well. Common reference V-com is a constant and does not change. With V-com modulation, common reference V-com varies periodically in time and is supplied by a V-com reference circuit. The data on the source line only controls the brightness of the color dot. Additional circuitry (not shown) is used to control the polarity. Generally, control timing and voltages are applied to a backplane to change the polarity. With V-com modulation the voltage range used on the source lines can be less than constant V-com drive systems while still having the same applied effective voltage on the liquid crystal, i.e., on the color dots.
The polarity switching may cause other image quality issues such as flicker if all the switching elements are of the same polarity. Spatial averaging is used to reduce flicker. Specifically, switching elements (e.g. transistors) are arranged in switching element driving scheme that include positive and negative polarities. Furthermore, to minimize cross talk the positive and negative polarities of the switching elements should be arranged in a uniform pattern, which also provides a more uniform power distribution. When the columns have the opposing polarity, the current in the columns effectively cancel out, which eliminates the cross talk component.
Various switching element driving schemes are used. The three main switching element driving schemes are switching element point inversion driving scheme, switching element row inversion driving scheme, and switching element column inversion driving scheme. FIGS. 4(b)-4(d) illustrate different switching element driving schemes using “+” for positive polarity and “−” for negative polarity within the electrodes of the color dots. In the switching element point inversion driving scheme, the switching elements form a checkerboard pattern of alternating polarities. FIG. 4(b) illustrates the switching element point inversion driving scheme with a display 410 having the same basic layout as display 400. Specifically in FIG. 4(b), a color dot CD_Z of pixel P(X, Y) has positive polarity if X plus Y plus Z is an odd number and has negative polarity if X plus Y plus Z is an even number. However in the next frame the polarities switch so that each color dot would have the opposite polarity.
In the switching element row inversion driving scheme, the switching elements on each row have the same polarity; however, each switching element in one row has the opposite polarity as compared to the polarity of switching elements in adjacent rows. FIG. 4(c) illustrates the switching element row inversion driving scheme using display 420 having the same basic layout as display 400. Specifically in FIG. 4(c), a color dot CD_Z of pixel P(X, Y) has positive polarity if Y is an even number and has negative polarity if Y is an odd number. However, in the next frame the polarities switch so that each color dot would have the opposite polarity.
In the switching element column inversion driving scheme, the switching elements on each column have the same polarity; however, a switching element in one column has the opposite polarity as compared to the polarity of switching elements in adjacent columns. FIG. 4(d) illustrates the switching element column inversion driving scheme using a display 440 having the same basic layout as display 400. Specifically in FIG. 4(d), a color dot CD_Z of pixel P(X, Y) has positive polarity if X plus Z is an odd number and negative polarity if X plus Z is an even number. However, in the next frame the polarities switch so that each color dot would have the opposite polarity.
Although displays 410, 420, and 430 have the same basic layout, the driving scheme differ greatly and the driving circuits are also very different. With switching element row inversion driving scheme, vertical cross talk is reduced. Conversely, with switching element column inversion driving scheme horizontal cross talk is reduced. Furthermore, flicker is reduced due to spatial averaging in both switching element column inversion and switching element row inversion driving schemes. Switching element point inversion driving scheme provides the best image quality due to reduction of both horizontal and vertical cross talk. Furthermore, flicker reduction is greater due to better spatial averaging as compared to switching element row inversion or switching element column inversion driving scheme.
However, switching element point inversion is less energy efficient and more costly and more difficult to implement as compared to switching element row inversion driving schemes. Specifically, switching element point inversion is not compatible with V-com modulation. Therefore, conventional switching element point inversion driving schemes use constant V-com drive systems and require high voltage source driver and higher power because of the line inversion component. Switching element row inversion driving schemes can be used with V-com modulation and thus can operate at lower voltages and have lower power consumption than switching element point inversion driving schemes. Furthermore, integrated circuits implementing switching element point inversion driving schemes require a high voltage (12 volts) fabrication process, which is more costly than lower voltage (5 volt) process that can be used with integrated circuits implementing switching element row inversion driving schemes. In addition the die size of integrated circuits implementing switching element point inversion driving schemes is larger than the die size of integrated circuits implementing switching element row inversion driving schemes. Thus, using switching element point inversion driving scheme is more costly in terms if manufacturing as well as power consumption than using switching element row inversion driving scheme. However, image quality is improved by using switching element point inversion driving schemes. Hence, there is a need for a method or system that can provide the image quality of switching element point inversion driving schemes without large manufacturing cost and power consumption of conventional switching element point inversion driving schemes.